25d24
< #include <rt_mmap.h>
31a31,32
> #define CONFIG_FLASH_16BIT 1
> 
35d35
< //#define CONFIG_FLASH_16BIT 1  (defined in include/configs/rt2880.h)
97c97
< 	//printf("twe0 set to %s\n",s);
---
>     printf("\n twe0 set to %s\n",s);
104c104
< 	//printf("toe0 set to %s\n",s);
---
>     printf("\n toe0 set to %s\n",s);
109c109
< 	regvalue = *(volatile u_long *)(RALINK_SYSCTL_BASE + 0x0308);
---
> 	regvalue = *(volatile u_long *)(0xA0300308);
134c134
< 	*(volatile u_long *)(RALINK_SYSCTL_BASE + 0x0308) = regvalue;
---
> 	*(volatile u_long *)(0xA0300308) = regvalue;
136c136
< 	regvalue = *(volatile u_long *)(RALINK_SYSCTL_BASE + 0x0308);
---
> 	regvalue = *(volatile u_long *)(0xA0300308);
143,149d142
< #if defined ON_BOARD_8M_FLASH_COMPONENT || defined ON_BOARD_16M_FLASH_COMPONENT
< #if defined (RT2880_ASIC_BOARD) || defined (RT2880_FPGA_BOARD) 
< 		ulong flashbase = PHYS_FLASH_2;
< #else
< 		ulong flashbase = PHYS_FLASH_1;
< #endif
< #else
151,155d143
< #if defined (RT3052_MP2) && defined (ON_BOARD_32M_FLASH_COMPONENT)
< 		if (i == 1)
< 			flashbase = PHYS_FLASH_2;
< #endif
< #endif
268,271c256,257
< 	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_MX
< 		&& ((info->flash_id & FLASH_TYPEMASK) == MX_ID_LV320BT ||
< 		    (info->flash_id & FLASH_TYPEMASK) == MX_ID_29LV640DB ||
< 		    (info->flash_id & FLASH_TYPEMASK) == MX_ID_29LV128DB)) {
---
>     if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_MX
> 		&& (info->flash_id & FLASH_TYPEMASK) == MX_ID_LV320BT) {
273d258
< 		int bootsect_size;	/* number of bytes/boot sector	*/
276d260
< 		bootsect_size = 0x00002000 * (sizeof(FPW)/2);
280,296c264,265
< 		for (i = 0; i < 8; ++i) {
< 			info->start[i] = base + (i * bootsect_size);
< 		}
< 		for (i = 8; i < info->sector_count; i++) {
< 			info->start[i] = base + ((i - 7) * sect_size);
< 		}
< 	}
< 	else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_MX
< 		&& ((info->flash_id & FLASH_TYPEMASK) == MX_ID_LV160B)) {
< 			info->start[0] = base; //16K
< 			info->start[1] = info->start[0] + 0x4000; //16K
< 			info->start[2] = info->start[1] + 0x2000; //8K
< 			info->start[3] = info->start[2] + 0x2000; //8K
< 			info->start[4] = info->start[3] + 0x8000; //32K
< 			for (i = 5; i < info->sector_count; i++) {
< 			    info->start[i] = info->start[4] + ( (i-4) * 0x00010000);//64K
< 			}
---
> 		for ( i = 0; i < info->sector_count; i++ )
> 			info->start[i] = base + (i * sect_size);
298c267
< 	else /*  if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
---
>    else /*  if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
300a270
> 
310c280,281
< 	}
---
> 
>    }
574,575c545,546
< 
< 		case (FPW)AMD_ID_LV320B:
---
> 	#if 1	
>        case (FPW)AMD_ID_LV320B:
580a552,553
>     #endif
> 	
582c555
< 		case (FPW)MX_ID_LV320BT:
---
>         case (FPW)MX_ID_LV320BT:
588,627c561
< 
< 		case (FPW)MX_ID_LV160B:
< 			info->flash_id += MX_ID_LV160B;
< 			info->sector_count = 35;
< 			info->size = 0x00200000 * (sizeof(FPW)/2);
< 		//	printf("\n MX_ID_LV160B, Size = %08x bytes\n",info->size);
< 			break;				
< 
< 		case (FPW)MX_ID_29LV640DB:
< 			info->flash_id += MX_ID_29LV640DB;
< 			info->sector_count = 135;
< 			info->size = 0x00800000 * (sizeof(FPW)/2);
< 			break;
< 
< 		case (FPW)MX_ID_29LV128DB:
< 			info->flash_id += MX_ID_29LV128DB;
< 			info->sector_count = 263;
< 			info->size = 0x01000000 * (sizeof(FPW)/2);
< 			break;
< 
< #if defined (RT3052_MP2) && defined (ON_BOARD_32M_FLASH_COMPONENT)
< 		case (FPW)FLASH_S29GL256N:
< 			/* winfred:
< 			 *  To support 32MB*1 (Spansion S29GL256N) flash on
< 			 *  RT3052 MP2, we separate it into 2 16MB bank:
< 			 *  bank 0: 0xBF000000 ~ 0xBFFFFFFF
< 			 *  bank 1: 0xBB000000 ~ 0xBBFFFFFF
< 			 *  So, we need to modify the flash info.
< 			 *  (We currently use first bank only, which makes
< 			 *   the sector_count to be 256 instead of 512.
< 			 *   Besides, sectorsize is 0x10000(wrong) instead of
< 			 *   0x20000, and size is 0x1000000(wront) instead of
< 			 *   0x2000000.)
< 			 */
< 			info->flash_id += FLASH_S29GL256N;
< 			info->sector_count = 256;
< 			info->size = 0x01000000 * (sizeof(FPW)/2);
< 			break;
< #endif
< 
---
> 			
655a590
> 
659c594
< 	int flag, sect = 0;
---
> 	int flag, prot, sect;
685d619
< 	case FLASH_MXLV160B:
695a630,631
> 	
> 
701a638,640
> 
> 		
> 
809,817c748,750
< 	case FLASH_MXLV320BT:
< 	case FLASH_MXLV160B:
< 	case AMD_ID_LV320B:
< 	case EN_ID_29LV640H:
< 	case MX_ID_29LV640DB:
< 	case MX_ID_29LV128DB:
< #if defined (RT3052_MP2) && defined (ON_BOARD_32M_FLASH_COMPONENT)
< 	case FLASH_S29GL256N:
< #endif
---
> 	case FLASH_MXLV320BT:	
> 	case AMD_ID_LV320B:	
> 	case EN_ID_29LV640H:	
869a803
> //================================================================
872a807,809
> 
> 			
> 
876a814
> 				
885a824,825
> 
> 				
893a834,835
> 			
> 
896a839
> 
906c849
< 					if ((now = get_timer(start)) > (ulong)CFG_FLASH_ERASE_TOUT) 
---
> 					if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) 
908a852,853
> 
> 				
923a869,870
> 
> 
934a882,886
> 				
> 				
> 
> 			
> 				
942d893
< 			sect = 7;
943a895,902
> 
> 
> 
> //================================================================
> 
> 		
> 
> 
976c935
< 			if ((now = get_timer(start)) > (ulong)CFG_FLASH_ERASE_TOUT) {
---
> 			if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
1091c1050
< #if defined (RT2880_ASIC_BOARD) || defined (RT2883_ASIC_BOARD) || defined (RT3052_ASIC_BOARD)
---
> 	#if EV_BOARD
1094a1054,1055
> 
> 	
1103,1109c1064
< #elif defined (RT3052_FPGA_BOARD)
< 	/* 
< 	   Must writing with this otherwise Flash write will abnormal 
< 	   For RT3052 FPGA 40MHz bus clock 
< 	*/
< 	while(*dest != 0xFFFF)  {
< #else
---
> 	#else
1111c1066
< #endif	
---
> 	#endif	
1113,1114c1068,1069
< #if 1 //defined (RT2880_ASIC_BOARD) || defined (RT3052_ASIC_BOARD)
< #else
---
> 	    #if EV_BOARD
> 		#else
1119c1074
< #endif
---
> 		#endif
1120a1076
> 
1199a1156,1158
> 
> 	ulong start;
> 	int flag;
1202,1204d1160
< 	int flag;
< 	ulong start;
< 
